-- -- **************************************************************************** -- -- -- Copyright @ 1999 -- -- -- -- Tetraedre SARL, chenes 19, 2072 Saint-Blaise, Switzerland -- -- -- -- **************************************************************************** -- -- -- Filename : tcdg_bench.vhd -- -- -- -- **************************************************************************** -- -- -- WARNING: This file is the property of Tetraedre SARL, Switzerland. This -- -- file is protected by a copyright. The reading, copying, compilation, -- -- synthesis and other use of this file is forbidden without a written -- -- agreement signed by Tetraedre SARL, Switzerland. -- -- -- -- IN NO EVENT SHALL TETRAEDRE SARL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER-- -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- -- FROM, OUT OF OR IN CONNECTION WITH THIS DESCRIPTION OR THE USE OF IT. -- -- -- -- **************************************************************************** --------------------------------------------------------------------------- ------------------------------ tcdg_bench ---------------------------- --------------------------------------------------------------------------- library ieee; use ieee.std_logic_1164.all; entity tcdg_bench is end; ---------- Architecture bench ---------- library ieee, work; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; architecture simple of tcdg_bench is signal key : std_logic_vector(63 downto 0); signal d : std_logic_vector(63 downto 0); signal start : std_logic; signal crypt : std_logic; signal erreur : std_logic; signal clk : std_logic; signal nreset : std_logic; signal q : std_logic_vector(63 downto 0); signal done : std_logic; component tcdg port ( key : in std_logic_vector(63 downto 0); d : in std_logic_vector(63 downto 0); start : in std_logic; crypt : in std_logic; clk : in std_logic; nreset: in std_logic; q : out std_logic_vector(63 downto 0); done : out std_logic ); end component; begin i_tcdg : tcdg port map ( key => key, d => d, crypt => crypt, start => start, clk => clk, nreset=> nreset, q => q, done => done ); process begin nreset <= '0'; wait for 100 ns; nreset <= '1'; wait; end process; P41 : process begin clk <= '0'; wait for 500 ns; clk <= '1'; wait for 500 ns; end process; -- ******************************************************** -- **** TEST PROCEDURE **** -- ******************************************************** P42 : process procedure des_test(constant xdatain : in bit_vector(63 downto 0); constant xkey : in bit_vector(63 downto 0); constant xexpect : in bit_vector(63 downto 0); constant xcrypt : in std_logic ) is variable expect : std_logic_vector(63 downto 0); begin crypt <= xcrypt; d <= to_stdlogicvector(xdatain); key <= to_stdlogicvector(xkey); start <= '1'; wait for 1000 ns; start <= '0'; d <= (others=>'0'); wait on done; wait for 400 ns; expect := to_stdlogicvector(xexpect); assert q=expect report "------------- !!! ERROR !!! " severity error; if (q/=expect) then erreur <= '1'; end if; wait for 50 ns; end des_test; -- ******************************************************** -- **** TEST VECTORS **** -- ******************************************************** begin start <= '0'; erreur <= '0'; wait for 2000 ns; des_test(X"0663D1B37C48090C",X"23456789ABCDEF01",X"3FA40E8A984D4815",'1'); des_test(X"95A8D72813DAA94D",X"8001010101010101",X"0000000000000000",'0'); des_test(X"0EEC1487DD8C26D5",X"4001010101010101",X"0000000000000000",'0'); des_test(X"7AD16FFB79C45926",X"2001010101010101",X"0000000000000000",'0'); des_test(X"D3746294CA6A6CF3",X"1001010101010101",X"0000000000000000",'0'); des_test(X"809F5F873C1FD761",X"0801010101010101",X"0000000000000000",'0'); des_test(X"C02FAFFEC989D1FC",X"0401010101010101",X"0000000000000000",'0'); des_test(X"4615AA1D33E72F10",X"0201010101010101",X"0000000000000000",'0'); des_test(X"2055123350C00858",X"0180010101010101",X"0000000000000000",'0'); des_test(X"DF3B99D6577397C8",X"0140010101010101",X"0000000000000000",'0'); des_test(X"31FE17369B5288C9",X"0120010101010101",X"0000000000000000",'0'); des_test(X"DFDD3CC64DAE1642",X"0110010101010101",X"0000000000000000",'0'); des_test(X"178C83CE2B399D94",X"0108010101010101",X"0000000000000000",'0'); des_test(X"50F636324A9B7F80",X"0104010101010101",X"0000000000000000",'0'); des_test(X"A8468EE3BC18F06D",X"0102010101010101",X"0000000000000000",'0'); des_test(X"A2DC9E92FD3CDE92",X"0101800101010101",X"0000000000000000",'0'); des_test(X"CAC09F797D031287",X"0101400101010101",X"0000000000000000",'0'); des_test(X"90BA680B22AEB525",X"0101200101010101",X"0000000000000000",'0'); des_test(X"CE7A24F350E280B6",X"0101100101010101",X"0000000000000000",'0'); des_test(X"882BFF0AA01A0B87",X"0101080101010101",X"0000000000000000",'0'); des_test(X"25610288924511C2",X"0101040101010101",X"0000000000000000",'0'); des_test(X"C71516C29C75D170",X"0101020101010101",X"0000000000000000",'0'); des_test(X"5199C29A52C9F059",X"0101018001010101",X"0000000000000000",'0'); des_test(X"C22F0A294A71F29F",X"0101014001010101",X"0000000000000000",'0'); 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des_test(X"0EF198BE0DA40F4D",X"456789ABCDEF0123",X"FE01E6214328F6D3",'0'); des_test(X"A17A95D6EA9AE293",X"456789ABCDEF0123",X"0C368689B611CDA0",'0'); des_test(X"FE01E6214328F6D3",X"23456789ABCDEF01",X"4A03D3FEA5A1E37A",'1'); des_test(X"2D4A0E0C423E6695",X"456789ABCDEF0123",X"475A68D3A3D89D20",'0'); des_test(X"0C368689B611CDA0",X"23456789ABCDEF01",X"43AF7B6D64CEA313",'1'); des_test(X"4A03D3FEA5A1E37A",X"0123456789ABCDEF",X"4E6F772069767521",'0'); des_test(X"1933FB0C744581C1",X"456789ABCDEF0123",X"E7EF69A22ADAFA7B",'0'); des_test(X"475A68D3A3D89D20",X"23456789ABCDEF01",X"DCE191055E0D4CE4",'1'); des_test(X"43AF7B6D64CEA313",X"0123456789ABCDEF",X"3D3075213C37CF8A",'0'); des_test(X"CBA84CBB201F76E0",X"456789ABCDEF0123",X"6B5F8A3E5BD561E4",'0'); des_test(X"E7EF69A22ADAFA7B",X"23456789ABCDEF01",X"4F0269117C22DCA6",'1'); des_test(X"DCE191055E0D4CE4",X"0123456789ABCDEF",X"CCC5D88ACBC393DF",'0'); des_test(X"4F55F346236AF664",X"456789ABCDEF0123",X"6E4BC32F763F12CD",'0'); des_test(X"6B5F8A3E5BD561E4",X"23456789ABCDEF01",X"D75635432DB7BEE6",'1'); des_test(X"4F0269117C22DCA6",X"0123456789ABCDEF",X"699EF7DA2DC96A23",'0'); des_test(X"6E4BC32F763F12CD",X"23456789ABCDEF01",X"837FD7A508C21F88",'1'); des_test(X"D75635432DB7BEE6",X"0123456789ABCDEF",X"810EFAF689F58FF6",'0'); des_test(X"837FD7A508C21F88",X"0123456789ABCDEF",X"0D3E612C365603B5",'0'); ASSERT erreur='0' REPORT "FINAL REPORT : TEST BENCH FAILED !!" SEVERITY error; ASSERT erreur='1' REPORT "FINAL REPORT : TEST BENCH SUCCESSFULL !" SEVERITY note; wait; end process; end simple;